PUBLICATIONS IN REFEREED JOURNALS and ARTICLES:
- Zyarah, Abdullah M. “Design and Analysis of a Reconfigurable Hierarchical Temporal Memory Architecture.” (2015).
PUBLICATIONS IN CONFERENCES:
- Abdullah M. Zyarah, Abhishek Ramesh, Cory Merkel, Dhireesha Kudithipudi, “Optimized hardware framework of MLP with random hidden layers“, Proc. SPIE 9850, Machine Intelligence and Bio-inspired Computation: Theory and Applications X, 985007 (May 12, 2016); doi:10.1117/12.2225498.
- Abdullah M. Zyarah, Dhireesha Kudithipudi, “Reconfigurable Hardware Architecture of the Spatial Pooler of Hierarchical Temporal Memory“, 2015 28th IEEE International System-on-Chip Conference (SOCC) – Emerging and Evolutionary Design; 09/2015.